| Info: | Additional info |
| Data type: | UDINT |
Description:
Internal runtime error during FPGA communication.
The additional information (Info1) shows the details:
0x0000 ... CRAM CRC is wrong.
0x0020 ... FPGA module register: CRC_D value invalid
0x0023 ... FPGA module register: DSCNT value invalid
0x0061 ... FPGA axis register: CRC_D value invalid
0x0062 ... FPGA axis register: DSCNT value invalid
0x0063 ... FPGA axis register: Fast CRC_D value invalid
0x0064 ... FPGA axis register: Fast DSCNT value invalid
0x0070 ... FPGA axis register: PWM power on status is invalid
0x0071 ... FPGA axis register: PWM interlock status is invalid
0x0072 ... FPGA axis register: PWM interlock time limit exceeded at power on
0x0073 ... FPGA axis register: PWM short cut exceeded
0x0074 ... FPGA axis register: PWM number of interlocks exceeded
Offset information for safety logger:
binary data[20..17]: Info1
Reaction:
The module changes into Functional Fail Safe state.
Cause/Remedy:
Carry out a Power Down/Power Up cycle!